R01DS0410EJ0110中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

The RA6E2 Group delivers up to 200 MHz of CPU performance using an Arm? Cortex?-M33 core with a code flash memory

ranging from 128 KB to 256 KB, 4 KB of data flash memory, and 40 KB of SRAM. The RA6E2 Group offers a wide set of

peripherals, including USB Full Speed, CANFD, Quad SPI, I3C, and ADC.

Features

■ Arm? Cortex?-M33 Core

● Armv8-M architecture with the main extension

● Maximum operating frequency: 200 MHz

● Arm Memory Protection Unit (Arm MPU)

– Protected Memory System Architecture (PMSAv8)

– Secure MPU (MPU_S): 8 regions

– Non-secure MPU (MPU_NS): 8 regions

● SysTick timer

– Embeds two Systick timers: Secure and Non-secure instance

– Driven by LOCO or system clock

● CoreSight? ETM-M33

■ Memory

● Up to 256-KB code flash memory

● 4-KB data flash memory (100,000 program/erase (P/E) cycles)

● 40-KB SRAM

■ Connectivity

● Serial Communications Interface (SCI) × 2

– Asynchronous interfaces

– 8-bit clock synchronous interface

– Smart card interface

– Simple IIC

– Simple SPI

– Manchester coding

● I3C bus interface (I3C)

● Serial Peripheral Interface (SPI) × 2

● Quad Serial Peripheral Interface (QSPI)

● USB 2.0 Full-Speed Module (USBFS)

● CAN with Flexible Data-rate (CANFD)

● Serial Sound Interface Enhanced (SSIE)

● Consumer Electronics Control (CEC)

■ Analog

● 12-bit A/D Converter (ADC12)

● 12-bit D/A Converter (DAC12) × 2

● Temperature Sensor (TSN)

■ Timers

● General PWM Timer 16-bit Enhanced (GPT16E) × 6

● Low Power Asynchronous General Purpose Timer (AGT) × 2

■ Security

● Arm? TrustZone?

– Up to three regions for the code flash

– Up to two regions for the data flash

– Up to three regions for the SRAM

– Individual secure or non-secure security attribution for each

peripheral

● 128-bit unique ID

● True Random Number Generator (TRNG)

● Pin function

– Secure pin multiplexing

■ System and Power Management

● Low power modes

● RealTime Clock (RTC) with calendar

● Event Link Controller (ELC)

● Data Transfer Controller (DTC)

● DMA Controller (DMAC) × 8

● Power-on reset

● Low Voltage Detection (LVD) with voltage settings

● Watchdog Timer (WDT)

● Independent Watchdog Timer (IWDT)

■ Multiple Clock Sources

● Main clock oscillator (MOSC) (8 to 24 MHz)

● Sub-clock oscillator (SOSC) (32.768 kHz)

● High-speed on-chip oscillator (HOCO) (16/18/20 MHz)

● Middle-speed on-chip oscillator (MOCO) (8 MHz)

● Low-speed on-chip oscillator (LOCO) (32.768 kHz)

● IWDT-dedicated on-chip oscillator (15 kHz)

● Clock trim function for HOCO/MOCO/LOCO

● PLL

● Clock out support

■ General-Purpose I/O Ports

● 5-V tolerance, open drain, input pull-up, switchable driving ability

■ Operating Voltage

● VCC: 2.7 to 3.6 V

■ Operating Temperature and Packages

● Ta = -40℃ to +105℃

– 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch)

– 48-pin QFN (7 mm × 7 mm, 0.5 mm pitch)

– 32-pin QFN (5 mm × 5 mm, 0.5 mm pitch)

● Ta = -40℃ to +85℃

– 64-pin BGA (5 mm × 5 mm, 0.5 mm pitch)

– 36-pin BGA (4 mm × 4 mm, 0.5 mm pitch)