R19DS0061EJ0100中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Features

? An ultra-fine CMOS process has been adopted for low power consumption in a

design with no charge-pump.

? A small 36-pin WLP package (ball pitch of 0.4mm/t=0.60mm) has been adopted.

? 1ch/2ch and 3ch/4ch are capable of 2-2 phase stepper drive, 1-2 phase (100)

stepper drive, 128, 256 and 512 resolution micro-steps.

? 3ch/4ch is capable of constant voltage drive.

? 5ch/6ch is capable of constant current drive.

? By using exclusive control mode on 5ch and 6ch, it resembles 7ch drive.

? Built-in 3 PI drivers channels.

? Built-in 3 Schmitt buffers channels.

? Built-in low-voltage malfunction prevention and thermal shutdown circuit.

? Power supplies VCC and VM are internally isolated and include a function to

prevent reverse current between the power supplies.