RM5231A集成電路（IC）的微處理器規(guī)格書PDF中文資料
| 廠商型號 |
RM5231A |
| 參數(shù)屬性 | RM5231A 包裝為散裝；類別為集成電路（IC）的微處理器；產(chǎn)品描述：MIPS PROCESSOR - 32-BIT SYSAD - |
| 功能描述 | 64-Bit MIPS RISC Microprocessor with 32/64-Bit System Bus |
| 文件大小 |
54.55 Kbytes |
| 頁面數(shù)量 |
4 頁 |
| 生產(chǎn)廠商 | PMC-Sierra, Inc |
| 企業(yè)簡稱 |
PMC |
| 中文名稱 | PMC-Sierra, Inc官網(wǎng) |
| 原廠標識 |  |
| 數(shù)據(jù)手冊 | |
| 更新時間 | 2025-5-18 22:58:00 |
| 人工找貨 | RM5231A價格和庫存，歡迎聯(lián)系客服免費人工找貨 |
RM5231A規(guī)格書詳情
Hardware Overview
The RM5231A offers a high-level of integration targeted at high-performance embedded applications. The key elements of the RM5231A are briefly described below.
Features
? Dual Issue superscalar microprocessor
? 250, 300, and 350 MHz operating frequencies
? Up to 420 Dhrystone 2.1 MIPS
? System interface optimized for embedded applications
? 32-bit system interface lowers total system cost
? High-performance write protocols maximize uncached write bandwidth
? Processor clock multipliers: 2, 2.5, 3, 3.5, 4, 4.5, 5, 6, 7, 8, 9
? IEEE 1149.1 JTAG boundary scan
? Integrated on-chip caches
? 32 KB instruction and 32 KB data — 2 way set associative
? Per set locking
? Virtually indexed, physically tagged
? Write-back and write-through on a per page basis
? Pipeline restart on first doubleword for data cache misses
? Integrated memory management unit
? Fully associative joint TLB (shared by I and D translations)
? 48 dual entries map 96 pages
? Variable page size (4 KB to 16 MB in 4x increments)
? High-performance floating-point unit — up to 700 MFLOPS
? Single cycle repeat rate for common single-precision operations and some double precision operations
? Two cycle repeat rate for double-precision multiply and double precision combined multiply-add operations
? Single cycle repeat rate for single-precision combined multiply-add operation
? MIPS IV instruction set
? Floating point multiply-add instruction increases performance in signal processing and graphics applications
? Conditional moves to reduce branch frequency
? Index address modes (register + register)
? Embedded application enhancements
? Specialized DSP integer Multiply-Accumulate instructions and 3-operand multiply instruction
? I and D cache locking by set
? Optional dedicated exception vector for interrupts
? Fully static 0.18 micron CMOS design with power down logic
? Standby reduced power mode with WAIT instruction
? 1.65 V or 1.8 V core with 3.3 V or 2.5 V I/O
? 128-pin QFP package
產(chǎn)品屬性
- 產(chǎn)品編號：
RM5231A-350P-B002
- 制造商：
Microchip Technology
- 類別：
集成電路（IC） > 微處理器
- 包裝：
散裝
- 核心處理器：
MIPS RISC
- 內(nèi)核數(shù)/總線寬度：
1 核，64 位
- 速度：
350MHz
- RAM 控制器：
SDRAM
- 圖形加速：
無
- 電壓 - I/O：
2.5V，3.3V
- 描述：
MIPS PROCESSOR - 32-BIT SYSAD -
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
PMC |
2016+ |
QFP |
6000 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價 | ||
PMC |
24+ |
QFP |
6000 |
全新原裝正品現(xiàn)貨,假一賠佰 |
詢價 | ||
PMC |
25+23+ |
TQFP |
36680 |
絕對原裝正品全新進口深圳現(xiàn)貨 |
詢價 | ||
PMC |
22+ |
TQFP-128 |
3000 |
原裝正品,支持實單 |
詢價 | ||
PMC |
23+ |
QFP |
4500 |
全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售 |
詢價 | ||
PMC |
22+ |
QFP160 |
2000 |
原裝正品現(xiàn)貨 |
詢價 | ||
PMC |
23+ |
QFP |
24981 |
原裝正品代理渠道價格優(yōu)勢 |
詢價 | ||
PMC |
21+ |
300P/PK |
12588 |
原裝正品,自己庫存 假一罰十 |
詢價 | ||
PMC |
23+ |
QFP |
5000 |
原裝正品,假一罰十 |
詢價 | ||
PMC |
24+ |
QFP-128P |
5040 |
詢價 |
