SAF-XC836-2FRI中文資料英飛凌數(shù)據(jù)手冊(cè)PDF規(guī)格書

The XC835/836 has the following features:

? High-performance XC800 Core

– compatible with standard 8051 processor

– two clocks per machine cycle architecture (for memory access without wait state)

– two data pointers

? On-chip memory

– 8 Kbytes of Boot ROM, Library ROM and User routines

– 256 bytes of RAM

– 256 bytes of XRAM

– 4/8 Kbytes of Flash (includes memory protection strategy)

? I/O port supply at 2.5 V - 5.5 V and core logic supply at 2.5 V (generated by embedded voltage regulator)

? Power saving modes

– idle mode

– power-down mode with wake-up capability via real-time clock event

– clock gating control to each peripheral

? Programmable 16-bit Watchdog Timer (WDT) running on independent oscillator with programmable window feature for refresh operation and warning prior to overflow

? Three general purpose I/O ports

– 4 high current I/O

– 2 high sink I/O

– Up to 25 pins as digital I/O

– Up to 8 pins as digital/analog input

? Up to 8 channels, 10-bit A/D Converter

– support up to 7 differential input channel

– results filtering by data reduction or digital low-pass filter, for up to 13-bit results

? Up to 8 channels, Out of range comparator

? Three 16-bit timers

– Timer 0 and Timer 1 (T0 and T1)

– Timer 2 (T2)

? Real-time clock with 32.768 kHz crystal pad

? 16-bit Vector Computer for Field-Oriented Control (FOC)

– Multiplication/Division Unit (MDU) for arithmetic calculation

– CORDIC Unit for trigonometric calculation

? Capture and Compare unit for PWM signal generation (CCU6)

? A full-duplex or half-duplex serial interface (UART)

? Synchronous serial channel (SSC)

? Inter-IC (IIC) serial interface

? LED and Touch-sense Controller (LEDTSCU)

? Software libraries to support fixed-point control and EEPROM emulation

? On-chip debug support via single pin DAP interface (SPD)

? Packages:

– PG-DSO-24

– PG-TSSOP-28

? Temperature range TA: – SAF (-40 to 85 °C)