SII141中文資料etc未分類制造商數據手冊PDF規(guī)格書

[Silicon Image, Inc.]

General Description

The SiI 141B uses PanelLink Digital technology to support displays ranging from VGA to High Refresh XGA (25-86 MHz), which is ideal for LCD desktop monitor applications. With a flexible single or dual pixel out interface and selectable output drive, the SiI 141B receiver supports up to true color panels (24 bit/pixel, 16.7M colors) in 1 pixel/clock mode (18 bit/pixel in 2 pixel/clock mode). PanelLink also features an inter-pair skew tolerance up to 1 full input clock cycle. The SiI 141B is pin for pin compatible with the SiI 141 but incorporates a number of enhancements. These include an improved jitter tolerant PLL design, new HSYNC filter and power down when the clock is inactive. All PanelLink products are designed on a scaleable CMOS architecture to support future performance requirements while maintaining the same logical interface. System designers can be assured that the interface will be fixed through a number of technology and performance generations.

Features

? Scaleable Bandwidth: 25-86 MHz (VGA to High Refresh XGA)

? Low Power: 3.3V core operation & power-down mode

? Automatic power down when clock is inactive

? High Skew Tolerance: 1 full input clock cycle (15ns at 65 MHz)

? Pin-compatible with SiI 101, SiI 141

? Sync Detect: for Plug & Display “Hot Plugging”

? Cable Distance Support: over 5m with twisted-pair, fiber-optics ready

? Compliant with DVI 1.0 (DVI is backwards compatible with VESA? P&DTM and DFP)