STI5300AUA中文資料意法半導體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The new STi5300 MPEG-2 decoder from ST provides a step-change in performance for pay TV set-top boxes and digital video recorders. Delivering 1.33 GOPS of processing power through an ST230 VLIW CPU running at 333 MHz, ST has ensured that manufacturers’ investment in new products is protected as the STi5300 can easily accommodate today’s interactive software, and provides a platform that can support the even more demanding applications of the future. Both

Linux and OS21 operating systems are supported, and an MMU provides support for virtual memory management.

FEATURES

■ ST231 VLIW host CPU

– 333 MHz, 32 Kbyte ICache,

32 Kbyte DCache

– up to 1.333 GOPs at 333 MHz

– dynamic memory management through MMU

■ Unified memory interface

■ Package 27 mm x 27 mm PBGA336

– footprint optimized for 2 layer PCBs

■ Dual transport stream merger

– supports DVB and DIRECTV?

– integrated DES-ECB, DVB and ICAM descramblers

– NDS RASP compliant

– low-cost DVB-CI and Cable Card support

■ MPEG-2 MP@ML video decoder

– trick modes including smooth fast forward and rewind

■ Graphics/display

– 4 display planes

– 2, 4 and 8 bpp CLUT graphics, 256 x 30 bits (AYCBCr) CLUT entries

– 16 bpp true color graphics,

– alpha blending, antialiasing, antiflutter, antiflicker filters