TC5165165AJ-60中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

Description

The TC5165165AJ/AFT is the EDO (hyper page) dynamic RAM organized 4,194,304 words by 16 bits. The TC5165165AJ/

AFT utilizes Toshiba's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operat-

ing margins, both internally and to the system user. Multiplexed address inputs permit the TC5165165AJ/AFT to be pack-

aged in a 50 pin plastic SOJ, and a 50 pin plastic TSOP. The package size provides high system bit densities and is

compatible with widely available automated testing and insertion equipment. System oriented features include single power

supply of 3.3V+0.3V tolerance, direct interfacing capability with high performance logic families such as Schottky LVTTL.

Features

4,194,304 word by 16 bit organization

? Fast access time and cycle time

Single power supply of 3.3V10.3V with a built-in Ves generator

Low Power

-

- 504mW MAX. Operating

(TC5165165AJ/AFT-60)

- 432mW MAX. Operating

(TC5165165AJ/AFT-70)

- 1.8mW MAX. Standby

-

Outputs unlatched at cycle end allows two-dimensional chip

selection

? Read-Modify-Write, CAS before RAS refresh,

RAS-only refresh, Hidden refresh, EDO (Hyper

Page Mode) and Test Mode capability

All inputs and outputs LVTTL compatible

1024 refresh cycles/16ms

? Package

TC5165165AJ: SOJ50-P-

TC5165165AFT: TSOP50-P-400D

For packaging details see Mechanical Dimensions section