TC551001ATRI-10L中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

Description

The TC551001API is a 1,048,576 bit CMOS static random access memory organized as 131,072 words by 8 bits and operated

from a single 5V power supply. Advanced circuit techniques provide both high speed and low power features with an operating cur-

rent of 5mA/MHz (typ.) and a minimum cycle time of 85ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low

power standby mode in which the standby current is 2μA typically. The TC551001API has three control inputs. Chip enable inputs

(CE1, CE2) allow for device selection and data retention control, while an output enable input (OE) provides fast memory access.

The TC551001API is suitable for use in microprocessor systems where high speed, low power, and battery backup are required.

The TC551001API has an operating temperature range of -40 - 85°C so it is suitable for use in wide operating temperature systems.

The TC551001API is offered in a standard dual-in-line 32-pin plastic package, a small outline plastic package, and a thin small

outline plastic package (forward type, reverse type).

Features

Low power dissipation:

? Standby current:

Single 5V power supply

Access time (max.)

Access Time

CET Access Time

CE2 Access Time

?E Access Time

27.5mW/MHz (typ.)

4μA (max.) at Ta = 25°C

Rin Na

TC551001API/AFI/AFTI/ATRI

-85L

85ns

85ns

85ns

45ns

? Power down feature:

? Data retention supply voltage:

? Inputs and outputs TTL compatible

Wide operating temperature:

? Package

TC551001API

TC551001AFI

TC551001AFTI

TC551001ATRI

CE1, CE2

-10L

100ns

100ns

100ns

50ns

2.0-5.5V

-40 85°C

: DIP32-P-600

: SOP32-P-525

: TSOP32-P-0820

: TSOP32-P-0820A