TPS7A2133PYWDJ集成電路（IC）的線性+開關穩(wěn)壓器規(guī)格書PDF中文資料

TPS7A2133PYWDJ屬于集成電路（IC）的線性+開關穩(wěn)壓器。由德州儀器制造生產的TPS7A2133PYWDJ穩(wěn)壓器 - 線性線性穩(wěn)壓器用于提供穩(wěn)定的輸出電壓，無論負載電流、輸入電壓或環(huán)境因素如何變化，這些輸出電壓通常都要保持不變。它們的工作原理要求輸入電壓維持在高于所需的輸出電壓，而且要超出某個最小量，并且在工作時會將輸入端的任何多余電壓轉換為熱量。對于大多數應用而言，雖然這種穩(wěn)壓器的效率低于開關模式的穩(wěn)壓器，但它們通常更適合對噪聲高度敏感的應用。

1 Features

? Very low IQ: 6.5 μA

? Input voltage range: 2.0 V to 6.0 V

? Output voltage range: 0.8 V to 5.5 V (50-mV steps)

? High PSRR: 91 dB at 1 kHz

? Low output voltage noise: 7.7 μVRMS

? Low dropout:

– 175 mV (maximum) at 500 mA (2.5-V VOUT)

? Smart EN pulldown

? Output voltage tolerance:

– ±1.5 (line, load, and temperature)

? Supports wide range of ceramic capacitors:

– 1 μF to 200 μF

? Operating junction temperature: –40°C to +125°C

? Package:

– 0.602-mm × 0.602-mm power DSBGA

2 Applications

? Mobile phones and tablets

? Wearables

? IP cameras

? Portable medical equipment

? Smart meters and field transmitters

? RF, PLL, VCO, and clock power supplies

? Motor drives

3 Description

The TPS7A21 is an ultra-small, low-dropout (LDO)

linear voltage regulator that can source 500 mA

of output current. The device provides low noise,

high PSRR, and excellent load and line transient

performance to meet the requirements of RF and

other sensitive analog circuits. Innovative design

techniques result in low-noise performance without

the addition of an external noise bypass capacitor.

With the device low quiescent current, the TPS7A21

is a good choice for battery-powered systems. The

2.0-V to 6.0-V input voltage range and 0.8-V to

5.5-V output voltage range support a variety of

system requirements. The internal precision reference

circuit enables excellent accuracy; the maximum

output voltage tolerance is 1.5 over load, line, and

temperature variations.

An internal soft-start circuit helps control the inrush

current, thus minimizing the input voltage drop during

start up. The LDO is stable with small ceramic

capacitors, allowing for a small overall solution size.

A smart enable input circuit with an internally

controlled pulldown resistor keeps the LDO disabled

even when the EN pin is unconnected and helps

eliminate external components that are otherwise

required to pull down the EN input.