TSER4905中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

1 Features

? Single or dual port MIPI DSI receiver

– Compliant to D-PHY v1.2 and DSI v1.3.1

– Packed 16/18/24/30-bit RGB and 16-bit YCbCr

– Loosely packed 18-bit RGB and 20-bit 4:2:2

– 1 clock lane and 1-4 configurable data lanes

per D-PHY Port

– Up to 2.5 Gbps/lane with skew calibration

– Supports data lane swap and polarity inversion

– Supports both burst and non-burst mode

– SuperFrame Unpacking Capability

– Suitable for 4K @ 60 Hz video resolution

? V3Link Enhanced Video interface

– Supports 10.8/6.75/3.375 Gbps per channel;

Up to 21.6 Gbps over dual channels

– Coax/STP interconnect support

– Port Splitting to enable Y-cable interfaces

? Ultra-low latency control channel

– Two I2C up to 1MHz (up to 3.4 MHz for local

bus access)

– High speed GPIOs

? Compatibility

– V3Link Video and V3Link Enhanced Video

product families

– V3Link Vision product family

? Security and diagnostics

– Voltage and temperature monitoring

– Line Fault Detection

– BIST and pattern generation

– CRC and error diagnostics

– Unique ID for counterfeit protection

– ECC on control bits

? Advanced link robustness and EMC control

– Data scrambling

– Spread spectrum clocking generation (SSCG)

? Low power operation

– 1.8-V and 1.1-V dual power supply

? Qualifications

– ISO 10605 and IEC 61000-4-2 ESD compliant

– 64 pin QFN Wettable flanks 9 mm x 9 mm

– Temperature Range: ?20℃ to +85℃

2 Applications

? High Resolution Display:

– Operating room displays

– Seatback entertainment displays

– High resolution HMI

3 Description

TSER4905 is a MIPI DSI to V3Link bridge device. In

conjunction with an V3Link deserializer, the chipset

provides a high-speed serialized interface over lowcost

50Ω coax or STP cables. The TSER4905 is a

D-PHY v1.2 compliant device that serializes a MIPI

DSI input supporting video resolutions including 4K

with 30-bit color depth. The V3Link interface supports

video and audio data transmission and full duplex

control, including I2C and GPIO data over a single

channel or dual channels. Consolidation of video

data and control over two V3Link lanes reduces

the interconnect size and weight and simplifies

system design. EMI is minimized by the use of

low voltage differential signaling, data scrambling,

SSCG, and randomization. This device can operate

either in V3Link Mode or V3Link Enhanced Video

Mode. In V3Link Enhanced Video Mode, the device

supports V3Link Enhanced Video output over a single

coax/STP cable operating up to 10.8 Gbps line rate or

Dual Coax/STP cable operating up to 21.6 Gbps line

rate, supporting 4K+ resolutions. In V3Link mode, the

devices supports up to 720p and 1080p resolutions

with 24-bit color depth over a single/dual link. In

Vision compatible mode, the device is interoperable

with V3Link Vision deserializers supporting resolutions

up to 8MP+/40fps.