UPD17012中文資料瑞薩數據手冊PDF規(guī)格書

FEATURES

? 17K architecture: General-purpose register method

? Program memory (ROM)

μPD17012: Mask ROM

8 KB (4,096 × 16 bits)

μPD17P012: One-time PROM

8 KB (4,096 × 16 bits)

? General-purpose data memory (RAM)

316 × 4 bits

? Instruction execution time

4.44 μs (with 4.5 MHz crystal resonator)

? Decimal operation

? Table reference

? Hardware for PLL frequency synthesizer

Dual modulus prescaler (250 MHz max.), programmable

divider, phase comparator, charge pump