VP16256中文資料ZARLINK數(shù)據(jù)手冊(cè)PDF規(guī)格書

The VP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the results being accumulated up to 32 bits.

FEATURES

■ Sixteen MACs in a Single Device

■ Basic Mode is 16-Tap Filter at up to 40MHz Sample Rates

■ Programmable to give up to 128 Taps with Sampling Rates Proportionally Reducing to 5MHz

■ 16-bit Data and 32-bit Accumulators

■ Can be configured as One Long Filter or Two HalfLength Filters

■ Decimate-by-two Option will Double the Filter Length

■ Coefficients supplied from a Host System or a local EPROM

■ 208-Pin Plastic PowerQuad PQ2 Package

APPLICATIONS

■ High Performance Commercial Digital Filters

■ Matrix Multiplication

■ Correlation

■ High Performance Adaptive Filtering