VSC8111中文資料VITESSE數(shù)據(jù)手冊(cè)PDF規(guī)格書

General Description

The VSC8111 is an ATM/SONET/SDH compatible transceiver integrating an on-chip clock multiplication unit (PLL) for the high speed clock and 8 bit serial-to-parallel and parallel-to-serial data conversion. The high speed clock generated by the on-chip PLL is selectable for 155.52 or 622.08 MHz operation. The demultiplexer contains SONET/SDH frame detection and recovery. In addition, the device provides both facility and equipment loopback modes and two loop timing modes. The part is packaged in a 100 PQFP with an integrated heat spreader for optimum thermal performance and reduced cost. The VSC8111 provides an integrated solution for ATM physical layers and SONET/SDH systems applications

Features

? Loss of Signal (LOS) Control

? Provides Equipment, Facilities and Split

Loopback Modes as well as Loop Timing Mode

? Meets Bellcore, ITU and ANSI Specifications for

Jitter Performance

? Single 3.3V Supply Voltage

? Low Power - 1.4 Watts Maximum

? 100 PQFP Package

? Operates at Either STS-3/STM-1 (155.52 Mb/s) or

STS-12/STM-4 (622.08 Mb/s) Data Rates

? Compatible with Industry ATM UNI Devices

? On Chip Clock Generation of the 155.52 Mhz

or 622.08 Mhz High Speed Clock

? Dual 8 Bit Parallel TTL Interface

? SONET/SDH Frame Detection and Recovery