VSP9415B中文資料MICRONAS數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Introduction

The VSP 94x2A (PRIMUS) is a new component of the Micronas MEGAVISION? IC set in a CMOS embedded DRAM technology. The VSP 94x2A comprises all main functions of a digital featurebox in one monolithic IC. The number of features is limited in favor of a lowcost solution, but no trade-off has been made concerning picture quality.

Features

– Integrated video matrix switch

? Up to seven CVBS inputs, up to two Y/C inputs,

? Three CVBS outputs (Y/C inputs signals are combined to CVBS output format)

? 9 bit amplitude resolution for CVBS, Y/C A/D converter

? AGC (Automatic Gain Control)

– Multi-standard color decoder

? PAL/NTSC/SECAM including all substandards

? Automatic recognition of chroma standard

? Only one crystal necessary for all standards

– RGB-FBL or YUV-H-V input

? 8 bit amplitude resolution for RGB or YUV

? 8 bit amplitude resolution for FBL or H

– ITU656 support (version dependent, refer to next chapter)

? ITU656 input/output

? DS656 output (double-scan ‘656-like’ output)

– Letterbox detection

– Noise reduction

? Temporal noise reduction

? Field-based temporal noise reduction for luminance and chrominance

? Different motion detectors for luminance and chrominance or identical

? Flexible programming of the temporal noise reduction parameters

? Automatic measurement of the noise level

– Horizontal scaling of the 1fH signal

? Split-screen possible with additional PiP or Text processor

– Flexible digital horizontal scaling of the 2fH signal

? Scaling factors: 3, ..., 0.75 including 16:9 compatibility

? 5 zone panorama generator

– Embedded memory

? On-chip memory controller

? Embedded DRAM core for field memory

? SRAM for PAL/SECAM delay line

– Data format 4:2:2

– Flexible clock and synchronization concept

? Horizontal line-locked or free-running mode

? Vertical locked or free-running mode

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