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HD74CDC857中文資料日立數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
HD74CDC857規(guī)格書(shū)詳情
Description
The HD74CDC857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs.
Features
? Supports 100 MHz to 150 MHz operation range *1
? Distributes one differential clock input pair to ten differential clock outputs pairs
? SSTL_2 (Stub Series Terminated Logic) differential inputs and LVCMOS reset (G) input
? Supports spread spectrum clock
? External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input
? Supports both 3.3 V/2.5V analog supply voltage (AVCC), and 2.5 V VDDQ
? No external RC network required
? Sleep mode detection
? 48pin TSSOP (Thin Shrink Small Outline Package)
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
HITACHISEMICONDUCTOR |
24+ |
35200 |
一級(jí)代理/放心采購(gòu) |
詢(xún)價(jià) | |||
HITACHI/日立 |
23+ |
SSOP48 |
6500 |
專(zhuān)注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢(xún)價(jià) | ||
EXAR深圳看 |
23+ |
TSSOP48 |
310000 |
原廠授權(quán)一級(jí)代理,專(zhuān)業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢(xún)價(jià) | ||
RENESAS |
SSOP-28 |
68500 |
一級(jí)代理 原裝正品假一罰十價(jià)格優(yōu)勢(shì)長(zhǎng)期供貨 |
詢(xún)價(jià) | |||
HIT |
20+ |
SOP |
2960 |
誠(chéng)信交易大量庫(kù)存現(xiàn)貨 |
詢(xún)價(jià) | ||
HITACHI/日立 |
22+ |
TSSOP24L |
14008 |
原裝正品 |
詢(xún)價(jià) | ||
HIT |
00+ |
TSSOP24 |
134 |
全新原裝100真實(shí)現(xiàn)貨供應(yīng) |
詢(xún)價(jià) | ||
RENESAS |
23+ |
SSOP-28 |
8890 |
價(jià)格優(yōu)勢(shì)/原裝現(xiàn)貨/客戶(hù)至上/歡迎廣大客戶(hù)來(lái)電查詢(xún) |
詢(xún)價(jià) | ||
HITACHI/日立 |
2022 |
TSSOP24L |
80000 |
原裝現(xiàn)貨,OEM渠道,歡迎咨詢(xún) |
詢(xún)價(jià) | ||
HIT |
23+ |
52406 |
##公司主營(yíng)品牌長(zhǎng)期供應(yīng)100%原裝現(xiàn)貨可含稅提供技術(shù) |
詢(xún)價(jià) |
