Q67100-Q2183中文資料西門子數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

3.3V 2M × 64-Bit EDO-DRAM Module

3.3V 2M x 72-Bit EDO-DRAM Module

168pin unbuffered DIMM Module with serial presence detect

The HYM64(72)V2005GU-50/-60 are industry standard 168-pin 8-byte Dual In-Line Memory Modules (DIMMs) which are organized as 2M x 64 and 2M x 72 high speed memory arrays designed with EDO DRAMs for non-parity and ECC applications. The DIMMs use eight 2M x 8 EDO DRAMs for the 2M x 64 organisation and nine 2M x 8 DRAMs for the 2M x 72 organisation, both in SOJ packages. Decoupling capacitors are mounted on the PC board.

? 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-Line Memory Module for PC main memory applications

? 1 bank 2M x 64, 2M x 72 organisation

? Optimized for byte-write non-parity or ECC applications

? Extended Data Out (EDO)

? Performance:

? Single +3.3 V ± 0.3 V Power Supply

? CAS-before-RAS refresh, RAS-only-refresh

? Decoupling capacitors mounted on substrate

? All inputs, outputs and clocks are fully LV-TTL compatible

? Serial presence detects (optional)

? Utilizes 2M × 8 -DRAMs in SOJ packages

? 2048 refresh cycles / 32 ms with 11 / 10 addressing (Row / Column)

? Gold contact pad

? Card Size: 133,35mm x 25,40 mm x 5,30 mm

? This DRAM product module family is intended to be fully pin and architecture compatible with the 168pin unbuffered SDRAM DIMM module family