RM5261A中文資料PMC數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠商型號(hào) |
RM5261A |
| 功能描述 | RM5261A??Microprocessor with 64-Bit System Bus Data Sheet Preliminary |
| 文件大小 |
683.05 Kbytes |
| 頁(yè)面數(shù)量 |
42 頁(yè) |
| 生產(chǎn)廠商 | PMC-Sierra, Inc |
| 企業(yè)簡(jiǎn)稱 |
PMC |
| 中文名稱 | PMC-Sierra, Inc官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-5-18 22:58:00 |
| 人工找貨 | RM5261A價(jià)格和庫(kù)存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
RM5261A規(guī)格書(shū)詳情
Hardware Overview
The RM5261A offers a high-level of integration targeted at high-performance embedded applications. The key elements of the RM5261A are briefly described below.
Features
? Dual Issue superscalar microprocessor
? 250, 300, and 350 MHz operating frequencies
? Up to 420 Dhrystone 2.1 MIPS
? High-performance system interface
? 64-bit multiplexed system address/data bus for optimum price/performance
? High-performance write protocols maximize uncached write bandwidth
? Processor clock multipliers 2, 2.5, 3, 3.5, 4, 4.5, 5, 6, 7, 8, 9
? IEEE 1149.1 JTAG boundary scan
? Integrated on-chip caches
? 32 KB instruction and 32 KB data — 2 way set associative
? Per set locking
? Virtually indexed, physically tagged
? Write-back and write-through on a per page basis
? Pipeline restart on first doubleword for data cache misses
? Integrated memory management unit
? Fully associative joint TLB (shared by I and D translations)
? 48 dual entries map 96 pages
? Variable page size (4 KB to 16 MB in 4x increments)
? High-performance floating-point unit: up to 700 MFLOPS
? Single cycle repeat rate for common single-precision operations and some double-precision operations
? Two cycle repeat rate for double-precision multiply and double precision combined multiply-add operations
? Single cycle repeat rate for single-precision combined multiply-add operation
? MIPS IV instruction set
? Floating point multiply-add instruction increases performance in signal processing and graphics applications
? Conditional moves to reduce branch frequency
? Index address modes (register + register)
? Embedded application enhancements
? Specialized DSP integer Multiply-Accumulate instructions and 3-operand multiply instruction
? I and D cache locking by set
? Optional dedicated exception vector for interrupts
? Fully static 0.18 micron CMOS design with power down logic
? Standby reduced power mode with WAIT instruction
? 1.65 V or 1.8 V core with 3.3 V or 2.5 V I/O
? 208-pin QFP package
產(chǎn)品屬性
- 型號(hào)：
RM5261A
- 制造商：
PMC
- 制造商全稱：
PMC
- 功能描述：
64-Bit MIPS RISC Microprocessor with 32/64-Bit System Bus
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
PMC |
2016+ |
QFP |
9000 |
只做原裝,假一罰十,公司可開(kāi)17%增值稅發(fā)票! |
詢價(jià) | ||
PMC |
24+ |
BGA |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢價(jià) | ||
PMC |
25+23+ |
BGA |
21356 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
PMC |
24+ |
QFP208 |
20000 |
全新原廠原裝，進(jìn)口正品現(xiàn)貨，正規(guī)渠道可含稅?。?/div> |
詢價(jià) | ||
PMC |
23+ |
QFP |
419 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
PMC |
22+ |
MQFP |
3000 |
原裝正品,支持實(shí)單 |
詢價(jià) | ||
PMC |
23+ |
QFP |
3000 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售! |
詢價(jià) | ||
PMC |
0151- |
25 |
公司優(yōu)勢(shì)庫(kù)存 熱賣中! |
詢價(jià) | |||
PMC |
22+ |
QFP |
2000 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
24+ |
5000 |
公司存貨 |
詢價(jià) |
