TC551664J-25中文資料東芝數(shù)據(jù)手冊PDF規(guī)格書

Description

The TC551664J is a 1,048,576 bit high speed CMOS static random access memory organized as 65,536 words by 16 bits and

operated from a single 5V supply. Toshiba's advanced CMOS technology and circuit design enable high speed operation.

The TC551664J features low power dissipation when the device is deselected using chip enable (CE), and has an output

enable input (OF) for fast memory access. Byte access is supported by upper and lower byte controls.

The TC561664J is suitable for use in high speed applications such as cache memory and high speed storage. All inputs and out-

puts are TTL compatible.

The TC551664J is available in a 400mil width, 44-pin SOJ suitable for high density surface assembly.

Features

Fast access time

TC551664J-15

- TC551664J-20

TC551661J-25

15ns (max.)

20ns (max.)

25ms (max.)

Low power dissipation.

Cycle Time

15

Operation (max.) 260 220 200 180

20 25 30 50

150

Standby:

1mA (max.)

Single 5V power supply: 5V±10

? Package:

Fully static operation

Inputs and outputs ITL compatible

? Output buffer control:

OE

Data byte controls:

LB, UB

SOJ44-P-400

ns

mA