VP0550N3-G中文資料微芯科技數(shù)據(jù)手冊PDF規(guī)格書

General Description

The VP0550 low-threshold, Enhancement-mode

(normally-off) transistor uses a vertical DMOS structure

and a well-proven silicon-gate manufacturing process.

This combination produces a device with the power

handling capabilities of bipolar transistors and the high

input impedance and positive temperature coefficient

inherent in MOS devices. Characteristic of all MOS

structures, this device is free from thermal runaway and

thermally induced secondary breakdown.

Microchip’s vertical DMOS FETs are ideally suited to a

wide range of switching and amplifying applications

where very low threshold voltage, high breakdown

voltage, high input impedance, low input

capacitance, and fast switching speeds are desired.

Features

? Free from Secondary Breakdown

? Low Power Drive Requirement

? Ease of Paralleling

? Low CISS and Fast Switching Speeds

? Excellent Thermal Stability

? Integral Source-to-Drain Diode

? High Input Impedance and High Gain

Applications

? Motor Controls

? Converters, Amplifiers and Switches

? Power Supply Circuits

? Drivers (Relays, Hammers, Solenoids, Lamps,

Memories, Displays, Bipolar Transistors, etc.)